Integrated circuits combining at least one high performance processor with on-chip cache memory have become common in the art. Integrated circuits combining more than one high performance processor with on-chip cache memory are also available.
Memory references from a processor that are found in a cache are known as cache “hits”. Memory references that do not “hit” in cache are cache “misses”.
Many high performance processor integrated circuits have two power domains, a first power domain operating at a relatively low, core, voltage; and a second power domain operating at a higher, I/O (Input/Output) voltage. This typically permits design of processor and cache circuitry with transistors of smaller dimensions, including oxide thickness, than those used in the I/O pad ring. Typical processors, including the Pentium-3 (trademark of Intel Corporation) processors, require that both the core and I/O power domains receive power for correct operation.
Standard real time clock circuits also typically have two power domains. A first power domain operates I/O pad ring and most other logic of the circuit. A second power domain provides power to the clock circuitry, and often to memory circuitry, on the same integrated circuit. These circuits are typically powered on both I/O and clock power domains during normal operation of a system, and powered by a battery on the clock power domain when the system is in a low-power state. It has been found that interface logic between the power domains must be carefully designed to prevent excessive load on the attached battery, and to prevent corruption of clock domain memory and logic during power transitions of the I/O power domain.
It is well known in the art of integrated circuits that manufacturing processes are imperfect—on each wafer some, but not all, integrated circuits function fully. It is also known that defects tend to occur in clusters. Therefore, for circuits having multiple, large, functional units, such as processors, there will be a substantial population of manufactured integrated circuits where one functional unit is defective, or even a small portion of a function unit is defective, but other functional units on the same integrated circuit function properly.
The probability that an integrated circuit will have one or more defects increases as the size of the integrated circuit increases. Further, the cost of fabrication increases as integrated circuit size increases. A high performance single or multiple-processor integrated circuit can be quite large. It is therefore desirable to find ways of selling at least some of those large, multiple processor, integrated circuits that contain one or a few defects.
High performance processor integrated circuits are known to consume copious amounts of power, power requirements may exceed one hundred twenty-five watts. Multiple processor integrated circuits can have even higher power requirements, potentially as much as one hundred and fifty watts.
High power consumption can result in undesirably short battery life in portable systems. High power consumption is environmentally undesirable, requires that cooling apparatus be provided, and can result in critical circuitry overheating. In addition, high power processors require a larger and more expensive infrastructure in terms of power delivery and heat removal. This infrastructure decreases the density of processors that can be attained within a given volume. This density of computation is an increasingly important metric.
It is known that load requirements on computer systems vary with time. Computer system performance can be degraded to conserve power during times of low load, and returned to full performance during times of high load.
Processor power typically has two components, static power that is constant with operating frequency, and dynamic power that is a function of operating frequency. Many notebook computers are equipped with adjustable clock circuits whereby processor operating frequency may be reduced, thereby reducing power consumption, during times of low load.
It is desirable to have additional ways of adjusting power consumption and performance to system load.